Low power CMOS design

  Use one page to introduce Low power. like what low-power CMOS is? Why use “CMOS”? High noise immunity, Low static power consumption, etc. Where does the power go? 1. Dynamic Power Consumption→Charging and Discharging Capacitors 2. Short Circuit Currents→Short Circuit Path between Supply Rails during Switching 3. Leakage→Leaking diodes and transistors Used source: http://www.eeherald.com/section/design-guide/Low-Power-VLSI-Design.html https://www.intechopen.com/chapters/59358 You can add more sources for sure. Please see the attachment for a sample PPT.